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Lattice Semiconductor
Figure 1. Typical PCI Express Topology
CPU
PCI Express PCI Express
Endpoint
Root
Complex
PCI Express
PCI Express User’s Guide
Memory
PCI Bridge
PCI Express
PCI Express
Switch
PCI Express
PCI Express
PCI Express
Legacy
Endpoint
Legacy
Endpoint
Legacy
Endpoint
Legacy
Endpoint
In the above environment a Root Complex denotes the root of an I/O hierarchy that connects the CPU/memory
subsystem to the I/O.
A Switch device is de?ned as a logical assembly of multiple virtual PCI-to-PCI Bridge devices
An Endpoint device refers to a type of device that is either the Requester or Completer of a PCI Express transac-
tion either on its own behalf or on behalf of a distinct non-PCI Express device (other than a PCI device or Host
CPU), e.g., a PCI Express attached graphics controller or a PCI Express-USB host controller. Endpoints are either
classi?ed as legacy or PCI Express Endpoints. It is basically a device with a type 00h Con?guration Space header.
PCI Express uses a packetized and layered protocol structure. The three main protocol layers implemented within
the core are the Physical Layer, Data Link Layer and Transaction Layer. Packets are formed in the Transaction and
Data Link Layers to carry the information from the transmitting component to the receiving component. As the
transmitted packets ?ow through the other layer, they are extended with additional information necessary to handle
packets at those layers. At the receiving side the reverse process occurs and packets get transformed from their
Physical Layer representation to the Data Link Layer representation and ?nally to the form that can be processed
by the Transaction Layer of the receiving device. The following ?gure shows the conceptual ?ow of packet informa-
tion through the layers.
3
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